Functional Design Errors in Digital Circuits

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Due to the dramatic increase in design complexity, modern circuits are often produced with functional errors. While improvements in verification allow engineers to find more errors, fixing these errors remains a manual and challenging task. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging, (2) an RTL error diagnosis method that identifies the root cause of errors directly, (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs, (4) a symmetry-based rewiring technology for fixing electrical errors, (5) an incremental verification system for physical synthesis, and (6) an integrated framework for post-silicon debugging and layout repair. In addition, Functional Design Errors in Digital Circuits Diagnosis describes a comprehensive evaluation of spare-cell insertion methods. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.